1. General rules
1.1 The digital, analog, and DAA signal wiring areas are pre-divided on the PCB.
1.2 Digital and analog components and corresponding wiring should be separated as much as possible and placed in their own wiring areas.
1.3 The high-speed digital signal traces should be as short as possible.
1.4 Keep sensitive analog signal traces as short as possible.
1.5 Reasonable distribution of power and ground.
1.6 DGND, AGND, and field are separated.
1.7 Use wide wires for power supply and critical signal traces.
1.8 The digital circuit is placed near the parallel bus/serial DTE interface, and the DAA circuit is placed near the telephone line interface.
2. Component placement
2.1 In the system circuit schematic diagram:
a) Divide digital, analog, DAA circuits and their related circuits;
b) Divide digital, analog, mixed digital/analog components in each circuit;
c) Pay attention to the positioning of the power supply and signal pins of each IC chip.
2.2 Preliminarily divide the wiring area of digital, analog, and DAA circuits on the PCB (general ratio 2/1/1), and keep digital and analog components and their corresponding wiring as far away as possible and limit them to their respective wiring areas.
Note: When the DAA circuit occupies a large proportion, there will be more control/status signal traces passing through its wiring area, which can be adjusted according to local regulations, such as component spacing, high voltage suppression, current limit, etc.
2.3 After the preliminary division is completed, start placing components from Connector and Jack:
a) The position of the plug-in is reserved around the Connector and Jack;
b) Leave space for power and ground wiring around the components;
c) Set aside the position of the corresponding plug-in around the Socket.
2.4 First place hybrid components (such as Modem devices, A/D, D/A conversion chips, etc.):
a) Determine the placement direction of components, and try to make the digital signal and analog signal pins face their respective wiring areas;
b) Place components at the junction of digital and analog signal routing areas.
2.5 Place all analog devices:
a) Place analog circuit components, including DAA circuits;
b) Analog devices are placed close to each other and placed on the side of the PCB that includes TXA1, TXA2, RIN, VC, and VREF signal traces;
c) Avoid placing high-noise components around the TXA1, TXA2, RIN, VC, and VREF signal traces;
d) For serial DTE modules, DTE EIA/TIA-232-E
The receiver/driver of the series interface signals should be as close as possible to the Connector and away from the high-frequency clock signal routing to reduce/avoid the addition of noise suppression devices on each line, such as choke coils and capacitors.
2.6 Place digital components and decoupling capacitors:
a) The digital components are placed together to reduce the length of the wiring;
b) Place a 0.1uF decoupling capacitor between the power supply and ground of the IC, and keep the connecting wires as short as possible to reduce EMI;
c) For parallel bus modules, the components are close to each other
The connector is placed on the edge to comply with the application bus interface standard, such as the length of the ISA bus line is limited to 2.5in;
d) For serial DTE modules, the interface circuit is close to the Connector;
e) The crystal oscillator circuit should be as close as possible to its driving device.
2.7 The ground wires of each area are usually connected at one or more points with 0 Ohm resistors or beads.
3. Signal routing
3.1 In the modem signal routing, the signal lines that are prone to noise and the signal lines that are susceptible to interference should be kept as far away as possible. If it is unavoidable, use a neutral signal line to isolate.
3.2 The digital signal wiring should be placed in the digital signal wiring area as much as possible;
The analog signal wiring should be placed in the analog signal wiring area as much as possible;
(Isolation traces can be pre-placed to limit to prevent traces from routing out of the routing area)
Digital signal traces and analog signal traces are perpendicular to reduce cross-coupling.
3.3 Use isolated traces (usually ground) to confine analog signal traces to the analog signal routing area.
a) The isolated ground traces in the analog area are arranged on both sides of the PCB board around the analog signal wiring area, with a line width of 50-100mil;
b) The isolated ground traces in the digital area are routed around the digital signal wiring area on both sides of the PCB board, with a line width of 50-100mil, and the width of one side of the PCB board should be 200mil.
3.4 Parallel bus interface signal line width > 10mil (generally 12-15mil), such as /HCS, /HRD, /HWT, /RESET.
3.5 The line width of analog signal traces is >10mil (generally 12-15mil), such as MICM, MICV, SPKV, VC, VREF, TXA1, TXA2, RXA, TELIN, TELOUT.
3.6 All other signal traces should be as wide as possible, the line width should be >5mil (10mil in general), and the traces between components should be as short as possible (pre-consideration should be considered when placing devices).
3.7 The line width of the bypass capacitor to the corresponding IC should be >25mil, and the use of vias should be avoided as much as possible.3.8 Signal lines passing through different areas (such as typical low-speed control/status signals) should pass through isolated ground wires at one point (preferred) or two points. If the trace is only on one side, the isolated ground trace can go to the other side of the PCB to skip the signal trace and keep it continuous.
3.9 Avoid using 90-degree corners for high-frequency signal routing, and use smooth arcs or 45-degree corners.
3.10 High-frequency signal routing should reduce the use of via connections.
3.11 Keep all signal traces away from the crystal oscillator circuit.
3.12 For high-frequency signal routing, a single continuous routing should be used to avoid the situation where several sections of routing extend from one point.
3.13 In the DAA circuit, leave a space of at least 60mil around the perforation (all layers).
4. Power supply
4.1 Determine the power connection relationship.
4.2 In the digital signal wiring area, use a 10uF electrolytic capacitor or a tantalum capacitor in parallel with a 0.1uF ceramic capacitor and then connect it between the power supply and the ground. Place one at the power inlet end and the farthest end of the PCB board to prevent power spikes caused by noise interference.
4.3 For double-sided boards, in the same layer as the power-consuming circuit, surround the circuit with power traces with a line width of 200mil on both sides. (The other side must be processed in the same way as the digital ground)
4.4 Generally, the power traces are laid out first, and then the signal traces are laid out.
5. ground
5.1 In the double-sided board, the unused areas around and below the digital and analog components (except DAA) are filled with digital or analog areas, and the same areas of each layer are connected together, and the same areas of different layers are connected through multiple vias : The Modem DGND pin is connected to the digital ground area, and the AGND pin is connected to the analog ground area; the digital ground area and the analog ground area are separated by a straight gap.
5.2 In the four-layer board, use the digital and analog ground areas to cover digital and analog components (except DAA); the Modem DGND pin is connected to the digital ground area, and the AGND pin is connected to the analog ground area; the digital ground area and the analog ground area are used separated by a straight gap.
5.3 If an EMI filter is required in the design, a certain space should be reserved at the interface socket. Most EMI devices (beads/capacitors) can be placed in this area; connected to it.
5.4 The power supply of each functional module should be separated. Functional modules can be divided into: parallel bus interface, display, digital circuit (SRAM, EPROM, Modem) and DAA, etc. The power/ground of each functional module can only be connected at the source of power/ground.
5.5 For serial DTE modules, use decoupling capacitors to reduce power coupling, and do the same for telephone lines.
5.6 The ground wire is connected through one point, if possible, use Bead; if it is necessary to suppress EMI, allow the ground wire to be connected in other places.
5.7 All ground wires should be as wide as possible, 25-50mil.
5.8 The capacitor traces between all IC power supply/ground should be as short as possible, and no via holes should be used.
6. Crystal oscillator circuit
6.1 All traces connected to the input/output terminals of the crystal oscillator (such as XTLI, XTLO) should be as short as possible to reduce the influence of noise interference and distributed capacitance on the Crystal. The XTLO trace should be as short as possible, and the bending angle should not be less than 45 degrees. (Because XTLO is connected to a driver with fast rise time and high current)
6.2 There is no ground layer in the double-sided board, and the ground wire of the crystal oscillator capacitor should be connected to the device with a short wire as wide as possible
The DGND pin closest to the crystal oscillator, and minimize the number of vias.
6.3 If possible, ground the crystal case.
6.4 Connect a 100 Ohm resistor between the XTLO pin and the crystal/capacitor node.
6.5 The ground of the crystal oscillator capacitor is directly connected to the GND pin of the Modem. Do not use the ground area or ground traces to connect the capacitor to the GND pin of the Modem.
7. Independent Modem design using EIA/TIA-232 interface
7.1 Use a metal case. If a plastic shell is required, metal foil should be pasted inside or conductive material should be sprayed to reduce EMI.
7.2 Place Chokes of the same pattern on each power cord.
7.3 The components are placed together and close to the Connector of the EIA/TIA-232 interface.
7.4 All EIA/TIA-232 devices are individually connected to power/ground from the power source. The source of power/ground should be the power input terminal on the board or the output terminal of the voltage regulator chip.
7.5 EIA/TIA-232 cable signal ground to digital ground.
7.6 In the following cases, the EIA/TIA-232 cable shield does not need to be connected to the Modem shell; empty connection; connected to the digital ground through a bead; the EIA/TIA-232 cable is directly connected to the digital ground when a magnetic ring is placed near the Modem shell.
8. The wiring of VC and VREF circuit capacitors should be as short as possible and located in the neutral area.
8.1 Connect the positive terminal of the 10uF VC electrolytic capacitor and the 0.1uF VC capacitor to the VC pin (PIN24) of the Modem through a separate wire.
8.2 Connect the negative terminal of the 10uF VC electrolytic capacitor and the 0.1uF VC capacitor to the AGND pin (PIN34) of the Modem through a Bead and use an independent wire.
8.3 Connect the positive terminal of the 10uF VREF electrolytic capacitor and the 0.1uF VC capacitor to the VREF pin (PIN25) of the Modem through a separate wire.
8.4 Connect the negative terminal of the 10uF VREF electrolytic capacitor and the 0.1uF VC capacitor to the VC pin (PIN24) of the Modem through an independent trace; note that it is independent from the 8.1 trace.
VREF ——+——–+
┿ 10u ┿ 0.1u
VC ——+——–+
┿ 10u ┿ 0.1u
+——–+—–~~~~~—+ AGND
Bead used should meet:
Impedance = 70W at 100MHz;;
rated current = 200mA;;
Maximum resistance = 0.5W.
9. Phone and Handset interface
9.1 Place Choke at the interface between Tip and Ring.
9.2 The decoupling method of the telephone line is similar to that of the power supply, using methods such as adding inductance combination, choke, and capacitor. However, the decoupling of the telephone line is more difficult and more noteworthy than the decoupling of the power supply. The general practice is to reserve the positions of these devices for adjustment during performance/EMI test certification.
Post time: May-11-2023